The Myth of the Harvard Architecture

The Myth of the Harvard Architecture is the title of a paper published in the peer-reviewed IEEE Annals of the History of Computing in September 2022. As of the release date, the paper - which contains more than 40 formal references - was the only published comprehensive analysis of the history, technology, and claimed benefits associated with the terms Harvard architecture and modified Harvard architecture. The paper challenges many widely repeated statements made about the Harvard architecture, suggesting that they are not only inaccurate - historically, technically, or both - but that these inaccuracies have can severe consequences, especially when taught as part of a Computer Science course at degree or even at high school level.
The paper, written by Richard Pawson, focuses principally on the three main historical developments to which these terms are most commonly applied:
* The Harvard machines (Harvard Mark I, II, III , and IV)
* The first microcontrollers, and the related later development of Digital Signal Processors.
* RISC processors that cache instructions and data separately
In all three cases instructions and data were in some sense being stored separately. However, the paper points out that "Every mainstream computer designed since 1945 stores instructions and data separately at some point—ultimately in different registers within the processor." All three of the developments listed above, "additionally split instructions and data earlier in the process, but in different ways, to achieve different benefits, and with different limitations."
The Harvard machines
During the late 1940s and early 1950s, the Harvard Computing Laboratory (HCL) under the direction of Howard H. Aiken was responsible for the conception and/or development of a series of four automated computing devices, that came to be known as the Harvard Mark I, II, III , and III. Although the first two were significant milestones in the history of computing, they have little relevance to the present discussion since the instructions were not ‘stored’ in any meaningful sense. Although the term ‘Harvard architecture’ was never used at the time (the word ‘architecture’ was first applied to computing only in the late 1960s), the Mark III and IV are relevant to any discussion of Harvard architecture because their designs stored instructions and data in separate memories; the instruction store could be loaded from an external source, before running, but was not writable at run-time.
It is well documented that Aiken was strongly opposed to the idea of self-modifying code, but Pawson argues:
* that this was a later position, and that Aiken's original motivation for separating the stores was principally to optimize their design to the different storage characteristics (both static and dynamic) of data and instructions. The evidence for this can be found in the detailed specifications of the two stores.
* that the risks of self-modifying code were greatly exaggerated by Aiken and his acolytes, given that the alternative use of dynamic addressing (for example via indexed or indirect registers) carried just as much risk of accidental corruption.
* that the insistence on the instruction store being non-writable by other instructions would have precluded the Harvard machines from running an operating system.
The paper further shows that the widespread statement that the separation or instruction and data stores in the Harvard machines permitted the instruction fetch, decode, and/or execution to overlap, is without basis: none of the Harvard machines permitted this.
The first microcontrollers
The term Harvard architecture does not appear in print until 1982, but it is clear from these sources and others quoted in the paper, that the term had been in use within the teams responsible for the first microcontrollers for up to a decade. Critically, Pawson argues in both cases the separation of instruction and data stores was not a design decision, it was a requirement: the program had to be in ROM to permit automatic boot up. The innovation - in the context of Harvard architecture - was the decision to hard-wire the address bus of the ROM to the program counter and the data bus to the instruction register. This permitted the two stores to have both different data and address widths.
The design also permitted instruction fetch to occur in parallel with decode and execution.

The rationale for calling this the Harvard architecture is not documented. Pawson states that:
"It is quite possible that whoever coined the term wrongly believed that the Mark III/IV designs had also enabled overlapping instruction and data fetches. Possibly they just wanted a name for the new pattern, and 'Harvard architecture' offered a certain cachet."
This design was also not applicable to general purpose computing, because it depended on at least one of the stores (or both) to be on the same chip as the processor. There was not enough room at the edge of the chip, nor pins on the package, to bring out two data- and two address-buses. Though chip and package sizes have since increased, so too have the data and address bus widths.
Within a few years of their invention, however, microcontrollers were starting to appear using the more conventional pattern of a single address and data bus for both instruction fetch and data access. However, the pattern of connecting the program ROM directly to the program counter and instruction register has re-appeared in several retrocomputing projects, most notably in the Gigatron.
Separate caches on RISC processors
The only meaning of the term Harvard architecture that is relevant to modern, general purpose computing is where instructions and data are stored in a common memory, but are cached separately on the processor. However, the performance gain from separating the caches is quite small, relative to the gain from caching instructions and data together. The paper illustrates this by looking at the history of the ARM architecture family, where on-chip caching had been used since ARM 3, but split caching did not appear until ARM 9 (though the idea had been introduced by the StrongARM project).
This pattern is sometime referred to as the ‘modified Harvard architecture. However, the paper shows that that term had appeared in 1985 in the context of Digital Signal Processing, but with a quite different meaning to its current usage.
Comparison of Harvard and von Neumann architectures
The paper also analyses the oft-repeated positioning of the Harvard architecture in contrast to the Von Neumann architecture.
"While there is much dispute both about the exact scope and definition of the latter and how much of it is legitimately attributed to John von Neumann, few dispute that the primary source, the First Draft of a Report on the EDVAC, (the 'First Draft') embodies—in today's terms—an 'architecture'. No definition of the 'Harvard architecture' provides an equivalent basis to the First Draft for designing a computer"
Using a set of 10 principles that reasonably define the von Neumann architecture (derived from an earlier paper by Haigh et al.) Pawson shows that the Harvard Mark III and Mark IV (being the only ones relevant to the present discussion) adopted 8 of the 10 principles, the exceptions being the use of decimal rather than binary representation, and the idea of memory being interchangeable (between instructions and data). Even John von Neumann had been uncharacteristically tentative on this issue, stating only that:
"While it appeared that various parts of this memory have to perform functions which differ somewhat in their nature and considerably in their purpose, it is tempting to treat the entire memory as one organ, and to have its parts even as interchangeable as possible."
Conclusion
In the conclusion section, the paper summarizes the three historical developments in a table that contrasts their design, possible benefits, limitations, and applicability, concluding that only the third (split-cache) pattern has relevance to modern, general purpose computing because it is the only one that will work with an operating system, and its contribution is modest. But ...
"it would be more accurately described as a 'modified von Neumann architecture' than a 'modified Harvard architecture'. In short, it is not architecture, and it did not derive from work at Harvard."

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