Wide Bus

Cromemco's Word Interleaved Data
Exchange Bus (WIDE-Bus) was a hosted
bus that operated over the standard
IEEE-696 bus. WIDE-Bus allows 32-bits
of data to be transferred by utilizing interleaving
techniques more commonly
used on mainframe computers. The bus
ran between the XXUprocessor board
and the 2048KZ memory board. The
MC68020 processor on the XXU
generates queries to memory in 32-bit
data packets, It then segmented the
query into two equal sized packets
which it transmitted over the WIDE-Bus
in a serial fashion. The 2048KZ accepted
both packets of information, decodes
them, and then locates the proper address in memory. Once the required
data is located, the 2048KZ completed
the cycle by transmitting it to the processor
in dual 16-bit packets.

This technique allowed Cromemco to
maintain the growth path provided by
the standard IEEE-696bus, while at the
same time matching the performance of
systems utilizing such dedicated 32-bit
buses as VME. The most widely noted
implementation of this interleaving (or
multiplexing) technique was on DEC's
MicroVAXII. DEC's Q-Bus is a 16-bit
bus which can transmit data in 32-bit
segments using similar interleaving
techniques as those implemented by
Cromemco.

The implementation of WIDE-Bus
combined with an integrated processor
and fast floating point co-processor, and
triple-cache architecture provides XXU
systems such as the CS420 with the
power to generate over 1,050,000
Whetstones.

Main Menu

See Also

Main Menu