List of instruction sets

A list of computer central processor instruction sets:
(By alphabetical order by its manufacturer.)
Advanced Digital Chips Inc.
* EISC: (AE32K) 32-bit embedded core
Altera (later, Intel)
* Nios II: 32-bit RISC, CPU core optimized for implementation in Altera FPGAs
AMD
* AM29000 (112 Instructions): RISC
* AMD extensions to x86
** (21 instructions): An extension for floating-point arithmetic
** (5 instructions): An extension for 3DNow!.
** ABM - Advanced Bit Manipulation
** SSE4a - streaming SIMD extensions 4a
** SSE5 - streaming SIMD extensions 5 (170 instructions, proposal)
** F16C - FP16 conversion operations, a revision of part of the proposed SSE5
** XOP - eXtended Operations, a revision of part of the proposed SSE5
** TBM - Trailing Bit Manipulation
* AMD64: 64-bit extension of x86, originally named x86-64, adopted by Intel
Analog Devices, Inc. (ADI)
* SHARC
* Blackfin
Apollo Computer Inc.
* Apollo PRISM: 32-bit VLIW RISC (Not to be confused with DEC Prism or m88k.)
ARC International (later, Synopsys)
* ARC: Pre-configurable core
* ARCompact
* ARCtangent
Arm
* ARM architecture
** ARMv1
** ARMv2
** ARMv3
** ARMv4
** ARMv5
*** Extensions
**** Thumb
**** DSP
**** Jazelle
**** VFPv2 - vector floating point
** ARMv6
*** Extensions
****
**** TrustZone
**** SIMD
** ARMv7
*** Extensions
**** Thumb-2
**** NEON - media acceleration technology
**** VFPv3
** ARMv8-A
*** Extensions
AT&T (later, Lucent then Agere then LSI, then Avago and Intel)
For StarCore DSP architecture, refer to section.
* DSP16
* DSP16A
* DSP1600
* ATT2100
* WE32K (WE 32000, WE 32100, WE 32200)
Atmel (later Microchip Technology)
* ATiny
* AVR
* AVR32
Axis Communications
* ETRAX CRIS
Burroughs (later, Unisys)
* B1000 series
* B2000/B3000/B4000 series
* B5000 series and B6000/B7000 series
Cambridge Consultants / Cambridge Silicon Radio (later, CSR plc)
* XAP series
CDC (Control Data Corporation)
* CDC 160 series
* CDC 924
* CDC 1604
* CDC 3000 24-bit
* CDC 3000 48-bit
* CDC 6000 series
* CDC 7600
* CDC STAR-100
* Cyber 70 and 170 series
* CDC Cyber 180
* CDC Cyber 200
Commonwealth Scientific and Industrial Research Organisation
* CSIRAC
Cray Research, Inc. (later, Silicon Graphics, Inc., then Cray Inc.)
* Cray-1 supercomputer
C-SKY Microsystems
* C-SKY
Cypress
* M8C Core: 8-bit MCU PSoC 1
Data General
* Nova: 16-bit CISC
* ECLIPSE: 16-bit CISC
* ECLIPSE/MV: 32-bit CISC
DEC (Digital Equipment Corporation)
* PDP-1: 18-bit CISC minicomputer
* PDP-4/PDP-7/PDP-9/PDP-15: 18-bit CISC minicomputer
* PDP-5/PDP-8/PDP-12: 12-bit CISC minicomputer
* PDP-6/PDP-10/DECSYSTEM-20: 36-bit CISC mainframe
* PDP-11: 16-bit CISC minicomputer
* VAX: 32-bit CISC
* Prism: 32-bit RISC
* Alpha: 64-bit RISC
Donald Knuth
Introduced in the textbook of Prof. Donald Knuth
* MIX
* MMIX
DSP Group (later, CEVA, Inc.)
DSP Group and Parthus Technologies plc were merged into CEVA, Inc. in 2002.
* Oak DSP Core
* Teak Series
** Teak DSP Core
** TeakLite DSP Core
** CEVA-TeakLite-4
*CEVA-X
*CEVA-XC
*CEVA-XC4000
*CEVA-XM4
Eckert-Mauchly Computer Corporation (later, Remington Rand then Sperry then Unisys)
* UNIVAC 1: The first commercial computer produced in the United States
Elliott Brothers
*
EnSilica
* eSi-RISC
Fairchild
* Clipper
Fujitsu (later, Cypress)
* FR Series: 32-bit RISC MCU
** FR30/FR60 Family ()
** FR80/FR81 Family (): Some instructions are removed and added against FR30 and FR60.
* FR-V: VLIW and vector processor based RISC
* F2MC Series
** F2MC-16 Family (): 16-bit MCU
** F2MC-8L/F2MC-8FX Family (): 8-bit MCU
General Electric (later, Honeywell, then Honeywell/Bull, and then NEC Corporation)
* GE-200 series: Small main frame, 20-bit word machine
* GE-400 series: Middle mainframe, 24-bit word machine
* GE-412: 20-bit word machine
* GE-600 series/Honeywell 6000 series: Large main frame, 36-bit CISC, word machine, LSB on left
** GE-625/635
** GE-645: Multics available
** Toshiba TOSBAC-5600: GECOS-3 and ACOS-6 available
** 6025, 6030, 6040, 6050, 6060, 6070, 6080: GCOS available
** HIS 6180: Multics available
** HIS Series 60 Level 66 and Level 66/DPS: GCOS available
** HIS Series 60 Level 68 and Level 68/DPS: Multics available
** HIS DPS-8: GCOS available
** HIS DPS-8M: Multics available GCOS available
** NEC ACOS Series 77 System 600, 700, 600S, 800, 900: ACOS-6 and GCOS-8 available, No Multics
General Instrument Microelectronics (later, Microchip Technology Incorporated)
The company was established as a subsidiary of General Instrument in 1987, then became an independent company as Microchip Technology in 1989.
* CP1600: 16-bit microprocessor
* SP0256 - Speech processor
* PIC microcontroller
** Mid-range PIC
** PIC16
*** PIC1605: NMOS 8-bit microcontroller, the basis of PIC architecture
** PIC17
** dsPIC33
Hennessy (,Prof.) and Patterson (,Prof.)
* DLX: Introduced as educational-use ISA in their famous textbooks; "Computer architecture : a quantitative approach" and "Computer organization and design : the hardware/software interface." GNU assembler is available.
* Stanford MIPS: Basis of MIPS architecture by Prof. John L. Hennessy
* Berkeley RISC: Basis of SPARC architecture by Prof. David Patterson
Hewlett-Packard
* HP 2100
* FOCUS
* HP 3000 "Classic" CISC
* PA-RISC
** PA-RISC 1.0
** PA-RISC 1.1
*** MAX-1 SIMD extensions
** PA-RISC 2.0
*** MAX-2 SIMD extensions
Hitachi (later, Renesas)
* HD6309 (): An extension for Motorola MC6809
* HD64180: Z80-based embedded MCU
* H8 Family
** H8/500 (63 instructions)
** For other H8 Series, refer to section.
* SuperH RISC engine Family 64-bit RISC
** For other SH Series, refer to section.
Holtek Semiconductor
* HT RISC: 8-bit RISC MCU
Honeywell
These are instruction sets introduced by Honeywell; for the instruction sets from General Electric, refer to the .
* Datamatic 1000, H-400, H-1400, H-800, H-1800, and H-1800-II: 48-bit word machine with 3 address format
* Series 200 model 200/1200/2200: A character-oriented two-address commercial computer
* Honeywell Model 8200: A system containing a word-processing subsystem based on the H-800 and a Variable Length Field (VLF) processor based on the H-200
* DDP Series 16 model 316 and 516: 16-bit minicomputer
IBM
* IBM 1130/IBM 1800
* IBM 1400 series/IBM 7010
* IBM 1620/IBM 1710
* IBM 37xx
* IBM 3790
* IBM 650
* IBM 701
* IBM 704/IBM 709/IBM 7090/IBM 7094/IBM 7040/IBM 7044
* IBM 702/IBM 705/IBM 7080
* IBM 7070/IBM 7072/IBM 7074
* IBM 7030 Stretch
* System/360 (32-bit CISC) and successors
** System/370: 32-bit CISC
** System/390: 32-bit CISC
** z/Architecture: 64-bit CISC
* IBM 8100
* IBM Series/1
* IBM System/3
* IBM System/4 Pi
** : Used in the moon flights
* IBM System/32
* IBM System/34
* IBM System/36
* IBM System/38/IBM AS/400/IBM System i MI code
* IBM System/7
* ROMP
* Power Architecture
** POWER ISA: POWER1, the RISC Single Chip, POWER2
** PowerPC ISA: POWER3
*** PowerPC v2.00: POWER4
*** PowerPC v2.01: POWER5
*** PowerPC v2.02:
*** Book E (Enhanced PowerPC) by NXP, by STM
*** Cell Broadband Engine Architecture (Including the PowerXCell 8i): PowerPC ISA v2.02 + 8× for vector/SIMD multimedia extensions
** PowerPC AS
** Power ISA
*** Power ISA v2.03: POWER6
*** Power ISA v2.04
*** Power ISA v2.05:
*** Power ISA v2.06B: POWER7
*** Power ISA v2.07B (for POWER8 & POWER8 with Nvidia NVLink)
*** Power ISA v3.0B (for POWER9)
**** PowerQUICC by NXP: PowerPC + plural of QUICC vector processor elements
Infineon Technologies AG
* C166
* C500
* TriCore
INMOS and XMOS
by Prof. David May
* Transputer
* XCore
Intel
* 4004 (46 instructions)
* 4040 (60 instructions) 8085 (113 Instructions)
* 8021 (66 Instructions)
* 8022 (73 Instructions)
* MCS-41 (also known as 8041) (87 instructions)
* MCS-48 (also known as 8048) (93 instructions)
* MCS-51 (also known as 8051) (111 instructions)
* iAPX 432
* i860: 32/64-bit VLIW RISC
* i960 (also known as 80960) (FIX MI core instructions with 11 addressing modes): 32-bit RISC
* IA-64 (also known as Itanium): Originated at Hewlett-Packard (HP), and later jointly developed by HP and Intel
* x86, See: x86 instruction listings
** 8086/8088, 80186/80188, 80286: 16-bit CISC
** IA-32: 32-bit CISC
** x86-64: 64-bit extension of x86, originally developed by AMD as AMD64
*** FPU (x87) - Floating-point-unit (FPU) instructions
*** MMX - MMX SIMD instructions
*** MMX Extended - extended MMX SIMD instructions
*** (21 instructions):
* LatticeMico32
Lebedev Institute of Precision Mechanics and Computer Engineering
*
*
*
* BESM-6
Maxim Integrated
* MAXQ
MIPS Technologies
* MIPS architecture
** MIPS I
** MIPS II
** MIPS III
** MIPS IV
** MIPS V
** MIPS16
** MIPS32
** MIPS64
** MDMX
* Loongson Technology
Loongson is a Chinese company. In its earlier stage, its architecture was MIPS like because of patents problem until a deal in 2007. In 2011, it formally licensed MIPS32 and MIPS64.
** Loongson 1: 32-bit MIPS like. Lacking 4 instructions by patent issue.
** Loongson 3: MIPS64 quad core. Over 200 instructions are added for x86 emulation.
MIT's Lisp machine (later, Symbolics, Inc., then Symbolics)
*CADR Lisp Machine
Mitsubishi Electric (later, Renesas)
* Mitsubishi D10V
* Mitsubishi D30V
*740 - 8-bit 6502 superset
*7700 Family - 16-bit
** 7700 Series (103 instructions)
** 7751 Series (109 instructions)
** 7900 Series (203 instructions): 16-bit MCU
MOS Technology (later, Commodore Semiconductor Group)
* MOS/CSG 6502: 8-bit CISC
* MOS/CSG 65CE02: added extra registers and instructions, having 6502 emulation
* Western Design Center 65816: 16-bit CISC, having 6502 emulation
Motorola (later, Freescale and then NXP Semiconductor)
For the Power Architecture, refer to section.
* 6800 Family: 8-bit CISC
** Motorola 6800 (107 instructions)
** Motorola 6801 (98 instructions)
** Motorola 6805 (86 instructions)
** Motorola 6809 (94 instructions)
*** Hitachi HD6309: Having some extensions.
** Freescale HC11 (62 instructions)
* CPU16 Family: 16-bit CISC
** Freescale HC16
* 68000 Family: 32-bit CISC
** 68000
** 68010
** 68020 and 68030
*** 68881 and 68882 FPUs
** 68040
** 68060
** 683XX
** ColdFire
* 88000: 32-bit RISC
* DSP56800
* StarCore DSP Architecture: Jointly developed by Agere and Motorola.
** SC100(V1)/SC140(V2): Baseline
** SC140e(V3): Minor additions
** SC3400(V5): Video, SIMD2
** SC3850(V6): Control ISA, Dual MPY, Cache instructions
** SC3900FP: SIMD8
National Semiconductor
* COP8
* CR16
* NSC800
* NS320xx
NCR Corporation
NEC Corporation
* Supercomputer
** SX architecture: A Scalar Processing Unit + eight Vector Processing Elements
*** SX-1 and SX-2
*** SX-3
*** SX-4 SX-9
*** Earth Simulator
*** SX-ACE
* Mainframe:
** Large mainframe (refer to )
** Middle mainframe
*** NEC ACOS Series 77 System 300, 400, 500: ACOS-4 OS, 32-bit byte machine
*** NEC ACOS System 1500
** Small mainframe
*** NEC ACOS Series 77 System 200:
* 17K Famiy (): 4-bit MCU
* 75 Family
** μPD7500: 4-bit MCU
*** μPD7500 set ? (106 instructions)
*** μPD7500 Set A (92 instructions)
*** μPD7500 Set ? (67 instructions)
** 75X Series (): 4-bit MCU
** 75XL Series (): 4-bit MCU
*μCOM-87 Family
** μCOM-87 Series (): 8-bit MCU
** μCOM-87LC Series (): 8-bit MCU
** μCOM-87AD Series
*** NMOS version (158 instructions): 8-bit MCU
*** CMOS version (159 instructions): 8-bit MCU
* 78K Family
** 78K/0 Series: 8-bit MCU. Refer to section
** 78K0R Series: 16/8-bit MCU. Refer section
** 78K/0S Series: 8-bit MCU. Refer to section
** 78K/1 Series(64 instructions): 8-bit MCU
** 78K/2 Series(65 instructions): 8-bit MCU
** 78K/3 Series(111 instructions with macro service): 16/8-bit MCU
** 78K/4 Series(113 instructions with macro service): 16/8-bit MCU
** 78K/6 Series ( with macro service): 16-bit MCU
* V60/V70, V80 (119, 123 instructions): 32-bit CISC, little endian
* V810/V830: 32-bit RISC, little endian
* V850: 32-bit RISC, Refer to section
OpenRISC Community
* OpenRISC 1000: ORBIS32; 32-bit RISC, big endian
Parallax, Inc.
* Propeller P8X32A: 32-bit RISC
PEZY Computing
* PEZY-1
* PEZY-SC
RCA
* CDP1802
* Spectra 70 (System/360 compatible in user mode ("problem state"), not compatible in kernel mode ("supervisor state"))
Renesas
The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1, 2003. In addition, NEC Electronics Corporation, a subsidiary of NEC Corporation, and Renesas Technology were merged into Renesas Electronics Corporation on April 1, 2010.
* RL78 Family: 8/16-bit CISC MCU, similar ISA to 8-bit 78K/0 legacy CISC, accumulator-based architecture, 2 operand instructions, 1-5 byte non-uniform length instructions, 13 addressing modes, non-orthogonal instruction set, little endian, 3-stage pipeline
** RL78-S1 Core (74 instructions): 75 instructions out of 80 are identical to RL78.
16-bit ALU, 8× 8-bit registers, 4× register-banks,
* RX Family: 32-bit CISC MCU, general-purpose-register-based architecture, 2 and 3 operand instructions, 1-8 byte non-uniform length instructions, 16× 32-bit GPRs, highly orthogonal instruction set, , optional single precision floating-point arithmetic operations, 5-stage
**RXv1 (90 instructions/10 addressing modes, basic:73, float:8, DSP:9)
** RXv2 (109 instructions/11 addressing modes, basic:75, float:11, DSP:23)
* RH850 Family: Upward compatible with V850 ISA, disclosed to automotive customers only
* V850 Family: 32-bit RISC MCU, general-purpose-register-based architecture, load/store architecture, 2 operand instructions, basically 2-byte and 4-byte 2-way form instructions (having extension), relatively orthogonal instruction sets, branch with , 32× 32-bit GPRs, little endian, optional single and double precision floating-point arithmetic operations, 5- or 7-stage synchronous pipeline
**V850 (74 instructions): Simple but sined-load/store, saturation arithmetic
**V850E (81 instructions) Unsigned-load/store extension, CISCy extension
**V850E1 (80 (83) instructions)
**V850ES (80 instructions)
**V850E1F (96 instructions): Floating-point arithmetic extension for single precision
(Also known as PHOENIX-Fx)
**V850E2 (89 instructions): Superscaler
**V850E2S (98 instructions): Memory protection
**V850E2M (98+α instructions): Memory protection, floating-point for single and double precision
**V850E3 (): SIMD extension, loop extension with branch predictor
* SuperH RISC engine Family: 32/64-bit RISC MCU/MPU, general-purpose-register-based architecture, load/store architecture, 2-byte uniform length instruction set, relatively orthogonal instruction sets, branch with delay slots, 16× 32-bit GPRs with partially 2 banks of 8 registers, 1× 32-bit global base register, 2× 32-bit MAC register, 1× 32-bit procedure register, optional 2 banks of 16× 32-bit floating-point registers, optional 2× 40-bit and 6× 32-bit DSP registers, bi-endian, 5- or 7-stage synchronous pipeline
** SH-1 (56 instructions): 32-bit RISC
** SH-2 (62 instructions): 32-bit RISC
** SH2A-FPU (112 instructions): 32-bit RISC
** SH-3E (84 instructions): 32-bit RISC
** SH4A (103 instructions): 32-bit RISC
** SH4AL-DSP (226 instructions): 32 -bit RISC
** For SH-5 Series, refer to section
* 78K Family:
** 78K0 Series (48 instructions): 8-bit MCU, accumulator-based architecture, 8× 8-bit registers, 4× register-banks, non-pipelined
** 78K0S Series (47 instructions): 8-bit simplified version of 78K0, no mul/div insn., no register-bank, etc.
** For 78K/1, 78K/2, 78K/3, 78K/4, and 78K/6 Series, refer to section.
** For 78K0R, refer to section.
* R8C Family: 16-bit CISC MCU
** R8C/Tiny Series (89 instructions)
* M16C Family (106 instructions): 16-bit CISC
* M32C Family (108 instructions): 16/32-bit CISC MCU, 2 banks of 4 × 16-bit data and 2 × 24-bit address registers
* M32R Family (83 instructions): 32-bit RISC MCU
** M32R-FPU (100 instructions): floating-point arithmetic extension
* H8SX Family (): 32-bit MCU
* H8S Family (): 32-bit MCU
* H8 Family
** H8/300 Series (): 16/8-bit MCU
** H8/300H Series (): 16/8-bit MCU
** H8/300L Series (): 16/8-bit MCU
** For H8/500 Series, refer to section
* 720 Family (135 instruction): 4-bit MCU, accumulator
* 740 Family (71 instructions): A 8-bit 6502 superset
Rockwell Collins
Samsung Electronics
* SAM8
Scenix Semiconductor (later, Ubicom then Qualcomm)
Ubicom was acquired by Qualcomm in 2012.
* SX Series: 8-bit microcontroller
* IP Series: 32-bit microprocessor (IP2000, IP8000, etc.)
Signetics
*2650 (75 instructions)
SpaceWire UK
* Raptor-16: 16-bit CISC
STMicroelectronics (formerly, SGS-Thomson)
For SPC5 Power Architecture Book E product line, refer to section.
* STM8 (80 instructions, 20 addressing modes): 8-bit MCU
* ST10 ("FIX-ME" basic instructions and "FIX-ME" MAC instructions): 16-bit MCU
* ST40 (): 32-bit RISC SuperH family SH-4 architecture, jointly developed with Hitachi
Sun Microsystems (later, Oracle)
* SPARC
** SPARC-V7
** SPARC-V8 32-bit stack machine, RISC + CISC, big endian
** picoJava: Having extended Bytecodes
** JEM1 by Rockwell Collins: A super-set of JVM Bytecode
** JEMCore-II by aJile Systems, Inc. (aJ-102 and aJ-200): Having another extended Bytecodes
* Java Card VM Bytecode: 16-bit stack machine, having completely different ISA from Java VM
* MAJC: VLIW
Tensilica (later, Cadence)
*CPUs
** Xtensa: Pre-configurable architecture
* DSPs
** HiFi Audio and Voice DSPs
** Vision DSPs
** ConnX D2
** ConnX BBE16
* 9940
* 9980
* MSP430
* TMS320 series
UNIVAC (later, Unisys)
* 1100/2200 series
University of California, Berkeley (UCB) (later, RISC-V Foundation)
* RISC-V: Open ISA introduced in 2010
University of Cambridge
* EDSAC: The first practical stored-program computer
* CAP computer
University of Texas at Austin, and University of Illinois at Urbana-Champaign
* LC-3: 16-bit RISC ISA for educational use
* LC-3b: Modified variant introduced with hardware microarchitecture
University of Tokyo
* TAC: A tube computer developed in 1959
U.S. Military
*ENIAC: One of the earliest electronic general-purpose computer
*MIL-STD-1750A: The U.S.'s military standard computer, 16-bit RISC
*Apollo Guidance Computer: Used in the moon flights
Xerox
Xilinx
* MicroBlaze
* PicoBlaze
Zilog (later, a subsidiary of IXYS Corporation)
* Z80, Z800, Z280, Z180, Z380, eZ80
* Z8, eZ8
* Z8000, Z80000

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